Peter Trommler [Tue, 7 Nov 2023 20:47:24 +0000 (21:47 +0100)]
[PATCH] PPC NCG: Generate clear right insn at arch width
The clear right immediate (clrrxi) is only available in word and
doubleword width. Generate clrrxi instructions at architecture
width for all MachOp widths.
Previously `ghc-prim`'s atomic wrappers used the legacy `__sync_*`
family of C builtins. Here we refactor these to rather use the
appropriate C11 atomic equivalents, allowing us to be more explicit
about the expected ordering semantics.
Hadrian passes the -DNOSMP flag to GHC when the target doesn't support
SMP, but doesn't pass it to CC as well, leading to the following
compilation error on mips64el:
| Run Cc (FindCDependencies CDep) Stage1: rts/sm/NonMovingScav.c => _build/stage1/rts/build/c/sm/NonMovingScav.o.d
Command line: /usr/bin/mips64el-linux-gnuabi64-gcc -E -MM -MG -MF _build/stage1/rts/build/c/hooks/FlagDefaults.thr_debug_p_o.d -MT _build/stage1/rts/build/c/hooks/FlagDefaults.o -Irts/include -I_build/stage1/rts/build -I_build/stage1/rts/build/include -Irts/include -x c rts/hooks/FlagDefaults.c -Wall -Wextra -Wstrict-prototypes -Wmissing-prototypes -Wmissing-declarations -Winline -Wpointer-arith -Wmissing-noreturn -Wnested-externs -Wredundant-decls -Wundef -fno-strict-aliasing -DTHREADED_RTS -DDEBUG -fomit-frame-pointer -O2 -g -Irts -I_build/stage1/rts/build -DDEBUG -fno-omit-frame-pointer -g3 -O0
===> Command failed with error code: 1
In file included from rts/include/Stg.h:348,
from rts/include/Rts.h:38,
from rts/hooks/FlagDefaults.c:8:
rts/include/stg/SMP.h:416:2: error: #error memory barriers unimplemented on this architecture
416 | #error memory barriers unimplemented on this architecture
| ^~~~~
rts/include/stg/SMP.h:440:2: error: #error memory barriers unimplemented on this architecture
440 | #error memory barriers unimplemented on this architecture
| ^~~~~
rts/include/stg/SMP.h:464:2: error: #error memory barriers unimplemented on this architecture
464 | #error memory barriers unimplemented on this architecture
| ^~~~~
The old make system correctly passed this flag to both GHC and CC [1].
CmmToC: fix CmmRegOff for 64-bit register on a 32-bit target
We used to print the offset value to a platform word sized integer.
This is incorrect when the offset is negative (e.g. output of cmm
constant folding) and the register is 64-bit but on a 32-bit target,
and may lead to incorrect runtime result (e.g. #22607).
The fix is simple: just treat it as a proper MO_Add, with the correct
width info inferred from the register itself.
hs_cmpxchg64 must return a StgWord64, otherwise incorrect runtime
results of 64-bit MO_Cmpxchg will appear in 32-bit unregisterised
builds, which go unnoticed at compile-time due to C implicit casting
in .hc files.
Ilias Tsitsimpis [Wed, 13 Dec 2023 10:28:47 +0000 (12:28 +0200)]
Add more hadrian bootstrap plans
Hadrian only contains bootstrap plans for previous GHC versions. Add plans for
the current version as well, since we may want to bootstrap hadrian with a
cross-compiled GHC that is of the same version as the GHC we are building here.
Bump supported LLVM range from 10 through 15 to 11 through 16
LLVM 15 turns on the new pass manager by default, which we have yet to
migrate to so for new we pass the `-enable-new-pm-0` flag in our
llvm-passes flag.
LLVM 11 was the first version to support the `-enable-new-pm` flag so we
bump the lowest supported version to 11.
Our CI jobs are using LLVM 12 so they should continue to work despite
this bump to the lower bound.
GHC 8.10 fails to build on armel with the following error:
LLVM ERROR: unable to allocate function argument #8
PLEASE submit a bug report to https://bugs.llvm.org/ and include the crash backtrace.
Stack dump:
0. Program arguments: llc-12 -O2 -enable-tbaa -relocation-model=pic -mcpu=arm7tdmi -mattr=+soft-float,-vfp2,-vfp2sp,-vfp3,-vfp3d16,-vfp3d16sp,-vfp3sp,-fp16,-vfp4,-vfp4d16,-vfp4d16sp,-vfp4sp,-fp-armv8,-fp-armv8d16,-fp-armv8d16sp,-fp-armv8sp,-fullfp16,-fp64,-d32,-neon,-crypto,-dotprod,-fp16fml,-bf16,-mve,-mve.fp,-fpregs,+strict-align /tmp/ghc5537_0/ghc_6.bc -o /tmp/ghc5537_0/ghc_7.lm_s
1. Running pass 'Function Pass Manager' on module '/tmp/ghc20177_0/ghc_6.bc'.
2. Running pass 'ARM Instruction Selection' on function '@"stg_gc_f1$def"'
`llc-12' failed in phase `LLVM Compiler'. (Exit code: -6)
make[3]: *** [rts/ghc.mk:325: rts/dist/build/HeapStackCheck.o] Error 1
This patch enables a few native 64-bit integer instructions
on x32 which are available on this architecture despite using
32-bit pointers. These instructions are present on x86_64 but
not on x86 and ghc checks the size of (void *) to determine
that. This method fails on x32 since despite using 32-bit
pointers and hence sizeof(void *) == 4, it still uses the
full x86_64 instruction set and software-emulated variants
of the aforementioned 64-bit integer instructions are
therefore not present in the toolchain which will make ghc
fail to build on x32.
See: https://ghc.haskell.org/trac/ghc/ticket/11571
Jani writes: The D16 part was Debian/Ubuntu specific, IIRC we define hardfloat
in that particular variant (16 double registers) or we had a different naming
for some reason.
Ilias Tsitsimpis [Wed, 13 Dec 2023 10:28:47 +0000 (12:28 +0200)]
ghc (9.4.7-2) unstable; urgency=medium
* Remove files generated by gen_contents_index at installation time (Closes:
#1055817)
* Canonicalize paths in gen_contents_index (Closes: #1055070)
* Backport upstream fix for CLRRI opcode on ppc64{el,} (Closes: #1054894)
* Pass number of parallel jobs from DEB_BUILD_OPTIONS to hadrian.
Code adapted from the debian/rules file for src:cmake.
Thanks to John Paul Adrian Glaubitz for the fix (Closes: #1056742).
* Restore --disable-ld-override for affected architectures (Closes: #1056636)
Previously `ghc-prim`'s atomic wrappers used the legacy `__sync_*`
family of C builtins. Here we refactor these to rather use the
appropriate C11 atomic equivalents, allowing us to be more explicit
about the expected ordering semantics.
Hadrian passes the -DNOSMP flag to GHC when the target doesn't support
SMP, but doesn't pass it to CC as well, leading to the following
compilation error on mips64el:
| Run Cc (FindCDependencies CDep) Stage1: rts/sm/NonMovingScav.c => _build/stage1/rts/build/c/sm/NonMovingScav.o.d
Command line: /usr/bin/mips64el-linux-gnuabi64-gcc -E -MM -MG -MF _build/stage1/rts/build/c/hooks/FlagDefaults.thr_debug_p_o.d -MT _build/stage1/rts/build/c/hooks/FlagDefaults.o -Irts/include -I_build/stage1/rts/build -I_build/stage1/rts/build/include -Irts/include -x c rts/hooks/FlagDefaults.c -Wall -Wextra -Wstrict-prototypes -Wmissing-prototypes -Wmissing-declarations -Winline -Wpointer-arith -Wmissing-noreturn -Wnested-externs -Wredundant-decls -Wundef -fno-strict-aliasing -DTHREADED_RTS -DDEBUG -fomit-frame-pointer -O2 -g -Irts -I_build/stage1/rts/build -DDEBUG -fno-omit-frame-pointer -g3 -O0
===> Command failed with error code: 1
In file included from rts/include/Stg.h:348,
from rts/include/Rts.h:38,
from rts/hooks/FlagDefaults.c:8:
rts/include/stg/SMP.h:416:2: error: #error memory barriers unimplemented on this architecture
416 | #error memory barriers unimplemented on this architecture
| ^~~~~
rts/include/stg/SMP.h:440:2: error: #error memory barriers unimplemented on this architecture
440 | #error memory barriers unimplemented on this architecture
| ^~~~~
rts/include/stg/SMP.h:464:2: error: #error memory barriers unimplemented on this architecture
464 | #error memory barriers unimplemented on this architecture
| ^~~~~
The old make system correctly passed this flag to both GHC and CC [1].
CmmToC: fix CmmRegOff for 64-bit register on a 32-bit target
We used to print the offset value to a platform word sized integer.
This is incorrect when the offset is negative (e.g. output of cmm
constant folding) and the register is 64-bit but on a 32-bit target,
and may lead to incorrect runtime result (e.g. #22607).
The fix is simple: just treat it as a proper MO_Add, with the correct
width info inferred from the register itself.
hs_cmpxchg64 must return a StgWord64, otherwise incorrect runtime
results of 64-bit MO_Cmpxchg will appear in 32-bit unregisterised
builds, which go unnoticed at compile-time due to C implicit casting
in .hc files.
Ilias Tsitsimpis [Wed, 18 Oct 2023 19:50:19 +0000 (22:50 +0300)]
Add more hadrian bootstrap plans
Hadrian only contains bootstrap plans for previous GHC versions. Add plans for
the current version as well, since we may want to bootstrap hadrian with a
cross-compiled GHC that is of the same version as the GHC we are building here.
Bump supported LLVM range from 10 through 15 to 11 through 16
LLVM 15 turns on the new pass manager by default, which we have yet to
migrate to so for new we pass the `-enable-new-pm-0` flag in our
llvm-passes flag.
LLVM 11 was the first version to support the `-enable-new-pm` flag so we
bump the lowest supported version to 11.
Our CI jobs are using LLVM 12 so they should continue to work despite
this bump to the lower bound.
GHC 8.10 fails to build on armel with the following error:
LLVM ERROR: unable to allocate function argument #8
PLEASE submit a bug report to https://bugs.llvm.org/ and include the crash backtrace.
Stack dump:
0. Program arguments: llc-12 -O2 -enable-tbaa -relocation-model=pic -mcpu=arm7tdmi -mattr=+soft-float,-vfp2,-vfp2sp,-vfp3,-vfp3d16,-vfp3d16sp,-vfp3sp,-fp16,-vfp4,-vfp4d16,-vfp4d16sp,-vfp4sp,-fp-armv8,-fp-armv8d16,-fp-armv8d16sp,-fp-armv8sp,-fullfp16,-fp64,-d32,-neon,-crypto,-dotprod,-fp16fml,-bf16,-mve,-mve.fp,-fpregs,+strict-align /tmp/ghc5537_0/ghc_6.bc -o /tmp/ghc5537_0/ghc_7.lm_s
1. Running pass 'Function Pass Manager' on module '/tmp/ghc20177_0/ghc_6.bc'.
2. Running pass 'ARM Instruction Selection' on function '@"stg_gc_f1$def"'
`llc-12' failed in phase `LLVM Compiler'. (Exit code: -6)
make[3]: *** [rts/ghc.mk:325: rts/dist/build/HeapStackCheck.o] Error 1
This patch enables a few native 64-bit integer instructions
on x32 which are available on this architecture despite using
32-bit pointers. These instructions are present on x86_64 but
not on x86 and ghc checks the size of (void *) to determine
that. This method fails on x32 since despite using 32-bit
pointers and hence sizeof(void *) == 4, it still uses the
full x86_64 instruction set and software-emulated variants
of the aforementioned 64-bit integer instructions are
therefore not present in the toolchain which will make ghc
fail to build on x32.
See: https://ghc.haskell.org/trac/ghc/ticket/11571
Jani writes: The D16 part was Debian/Ubuntu specific, IIRC we define hardfloat
in that particular variant (16 double registers) or we had a different naming
for some reason.
```
Command line: /opt/homebrew/opt/sphinx-doc/bin/sphinx-build -b man -d /private/tmp/extra-dir-55768274273/.doctrees-man -n -w /private/tmp/extra-dir-55768274273/.log docs/users_guide /private/tmp/extra-dir-55768274273
===> Command failed with error code: 2
Exception occurred:
File "/opt/homebrew/Cellar/sphinx-doc/6.0.0/libexec/lib/python3.11/site-packages/sphinx/ext/extlinks.py", line 101, in role
title = caption % part
~~~~~~~~^~~~~~
TypeError: not all arguments converted during string formatting
```
I tested on Sphinx-5.1.1 and Sphinx-6.0.0
Thanks for sterni for providing instructions about how to test using
sphinx-6.0.0.
The rts package uses GCC's __atomic built-in functions on 64-bit values. This
is not supported on some 32bit platforms (e.g., mipsel) resulting in the
following compilation error:
rts/dist/build/libHSrts_thr-ghc8.10.7.so: error: undefined reference to '__atomic_load_8'
rts/dist/build/libHSrts_thr-ghc8.10.7.so: error: undefined reference to '__atomic_store_8'
rts/dist/build/libHSrts_thr-ghc8.10.7.so: error: undefined reference to '__atomic_fetch_add_8'
Fix this by linking against libatomic.
Author: Ilias Tsitsimpis <iliastsi@debian.org>
Bug: https://gitlab.haskell.org/ghc/ghc/-/issues/20549
Forwarded: https://gitlab.haskell.org/ghc/ghc/-/merge_requests/6820
GHC 8.10 fails to build on armel with the following error:
LLVM ERROR: unable to allocate function argument #8
PLEASE submit a bug report to https://bugs.llvm.org/ and include the crash backtrace.
Stack dump:
0. Program arguments: llc-12 -O2 -enable-tbaa -relocation-model=pic -mcpu=arm7tdmi -mattr=+soft-float,-vfp2,-vfp2sp,-vfp3,-vfp3d16,-vfp3d16sp,-vfp3sp,-fp16,-vfp4,-vfp4d16,-vfp4d16sp,-vfp4sp,-fp-armv8,-fp-armv8d16,-fp-armv8d16sp,-fp-armv8sp,-fullfp16,-fp64,-d32,-neon,-crypto,-dotprod,-fp16fml,-bf16,-mve,-mve.fp,-fpregs,+strict-align /tmp/ghc5537_0/ghc_6.bc -o /tmp/ghc5537_0/ghc_7.lm_s
1. Running pass 'Function Pass Manager' on module '/tmp/ghc20177_0/ghc_6.bc'.
2. Running pass 'ARM Instruction Selection' on function '@"stg_gc_f1$def"'
`llc-12' failed in phase `LLVM Compiler'. (Exit code: -6)
make[3]: *** [rts/ghc.mk:325: rts/dist/build/HeapStackCheck.o] Error 1
In order to be able to perform a cross-build, we need to use
the stage1 binaries during installation. Both ghc and ghc-pkg
are run during the install target and therefore must be able
to run on the build machine.
Gbp-Pq: Name use-stage1-binaries-for-install.patch
This patch enables a few native 64-bit integer instructions
on x32 which are available on this architecture despite using
32-bit pointers. These instructions are present on x86_64 but
not on x86 and ghc checks the size of (void *) to determine
that. This method fails on x32 since despite using 32-bit
pointers and hence sizeof(void *) == 4, it still uses the
full x86_64 instruction set and software-emulated variants
of the aforementioned 64-bit integer instructions are
therefore not present in the toolchain which will make ghc
fail to build on x32.
See: https://ghc.haskell.org/trac/ghc/ticket/11571
Jani writes: The D16 part was Debian/Ubuntu specific, IIRC we define hardfloat
in that particular variant (16 double registers) or we had a different naming
for some reason.
[changes brought forward from 7.6.3-21+rpi1 by Peter Michael Green <plugwash@raspbian.org> at Sun, 19 Apr 2015 14:00:16 +0000]
* Change compiler defaults for armv6
[changed introduced in 7.10.3-2+rpi1 by Peter Michael Green]
* Add call to dh_autoreconf_clean
[changes brought forward from 9.0.2-4+rpi2 by Peter Michael Green <plugwash@raspbian.org> at Tue, 04 Oct 2022 05:00:41 +0000]
* Add build-conflicts on libllvm14
[changes brought forward from 9.0.2-4+rpi3 by Peter Michael Green <plugwash@raspbian.org> at Wed, 05 Oct 2022 13:33:13 +0000]
* Add build conflicts on libnuma1
```
Command line: /opt/homebrew/opt/sphinx-doc/bin/sphinx-build -b man -d /private/tmp/extra-dir-55768274273/.doctrees-man -n -w /private/tmp/extra-dir-55768274273/.log docs/users_guide /private/tmp/extra-dir-55768274273
===> Command failed with error code: 2
Exception occurred:
File "/opt/homebrew/Cellar/sphinx-doc/6.0.0/libexec/lib/python3.11/site-packages/sphinx/ext/extlinks.py", line 101, in role
title = caption % part
~~~~~~~~^~~~~~
TypeError: not all arguments converted during string formatting
```
I tested on Sphinx-5.1.1 and Sphinx-6.0.0
Thanks for sterni for providing instructions about how to test using
sphinx-6.0.0.
The rts package uses GCC's __atomic built-in functions on 64-bit values. This
is not supported on some 32bit platforms (e.g., mipsel) resulting in the
following compilation error:
rts/dist/build/libHSrts_thr-ghc8.10.7.so: error: undefined reference to '__atomic_load_8'
rts/dist/build/libHSrts_thr-ghc8.10.7.so: error: undefined reference to '__atomic_store_8'
rts/dist/build/libHSrts_thr-ghc8.10.7.so: error: undefined reference to '__atomic_fetch_add_8'
Fix this by linking against libatomic.
Author: Ilias Tsitsimpis <iliastsi@debian.org>
Bug: https://gitlab.haskell.org/ghc/ghc/-/issues/20549
Forwarded: https://gitlab.haskell.org/ghc/ghc/-/merge_requests/6820
GHC 8.10 fails to build on armel with the following error:
LLVM ERROR: unable to allocate function argument #8
PLEASE submit a bug report to https://bugs.llvm.org/ and include the crash backtrace.
Stack dump:
0. Program arguments: llc-12 -O2 -enable-tbaa -relocation-model=pic -mcpu=arm7tdmi -mattr=+soft-float,-vfp2,-vfp2sp,-vfp3,-vfp3d16,-vfp3d16sp,-vfp3sp,-fp16,-vfp4,-vfp4d16,-vfp4d16sp,-vfp4sp,-fp-armv8,-fp-armv8d16,-fp-armv8d16sp,-fp-armv8sp,-fullfp16,-fp64,-d32,-neon,-crypto,-dotprod,-fp16fml,-bf16,-mve,-mve.fp,-fpregs,+strict-align /tmp/ghc5537_0/ghc_6.bc -o /tmp/ghc5537_0/ghc_7.lm_s
1. Running pass 'Function Pass Manager' on module '/tmp/ghc20177_0/ghc_6.bc'.
2. Running pass 'ARM Instruction Selection' on function '@"stg_gc_f1$def"'
`llc-12' failed in phase `LLVM Compiler'. (Exit code: -6)
make[3]: *** [rts/ghc.mk:325: rts/dist/build/HeapStackCheck.o] Error 1
In order to be able to perform a cross-build, we need to use
the stage1 binaries during installation. Both ghc and ghc-pkg
are run during the install target and therefore must be able
to run on the build machine.
Gbp-Pq: Name use-stage1-binaries-for-install.patch
This patch enables a few native 64-bit integer instructions
on x32 which are available on this architecture despite using
32-bit pointers. These instructions are present on x86_64 but
not on x86 and ghc checks the size of (void *) to determine
that. This method fails on x32 since despite using 32-bit
pointers and hence sizeof(void *) == 4, it still uses the
full x86_64 instruction set and software-emulated variants
of the aforementioned 64-bit integer instructions are
therefore not present in the toolchain which will make ghc
fail to build on x32.
See: https://ghc.haskell.org/trac/ghc/ticket/11571
Jani writes: The D16 part was Debian/Ubuntu specific, IIRC we define hardfloat
in that particular variant (16 double registers) or we had a different naming
for some reason.
projects / ghc.git / log